Carrier: Valence holes and conduction electrons that are capable of carrying a charge through a solid surface in a silicon wafer.
Chemical-Mechanical Polish (CMP): A process of flattening and polishing wafers that utilizes both chemical removal and mechanical buffing. It is used during the fabrication process.
Chuck Mark: A mark found on either surface of a wafer, caused by either a robotic end effector, a chuck, or a wand.
Cleavage Plane: A fracture plane that is preferred.
Crack: A mark found on a wafer that is greater than 0.25 mm in length.
Crater: Visible under diffused illumination, a surface imperfection on a wafer that can be distinguished individually.
Crosstalk: unrelated circuits on a board interacting with one another. Ultimately causes device malfunction.
Conductivity (electrical): A measurement of how easily charge carriers can flow throughout a material.
Conductivity Type: The type of charge carriers in a wafer, such as “N-type” and “P-type”.
Contaminant, Particulate: (see light point defect)
Contamination Area: An area that contains particles that can negatively affect the characteristics of a silicon wafer.
Contamination Particulate: Particles found on the surface of a silicon wafer.
Crystal Defect: Parts of the crystal that contain vacancies and dislocations that can have an impact on a circuit’s electrical performance.
Crystal Indices: (see Miller indices)